Home Events Introduction to High-Level Synthesis (HLS)

Introduction to High-Level Synthesis (HLS)

Duration: 30 minutes

Selected topics covered in this webinar:

Benefits of onboard FPGA signal processing
FPGA architecture and development basics
Programming languages and development tools
Application areas and signal processing examples

Presenter: Thomas Elter

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9/30/2022 4:00 PM
9/30/2022 4:30 PM

On-demand Webinar