Webinar about digitizer FPGA firmware development using HLS
High-level synthesis (HLS) is used to develop firmware for
field-programmable gate arrays (FPGAs) in languages such as C. Join our
webinar to learn the basics of HLS in the context of high-performance
digitizers.
Topics covered in this webinar
- Benefits of onboard FPGA signal processing
- FPGA architecture and development basics
- Programming languages and development tools
- Application areas and signal processing examples
Date: Tuesday, September 27, 2022
Time: 10 AM PDT | 1 PM EDT
Duration: 30 minutes
Unable to attend? Register anyway to access the
webinar on-demand after the event.
Presenter: Thomas Elter, Senior Field
Applications Engineer.
