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ADX - ADC Interleaving IP

ADX is an interleaving post-correction digital IP with extreme performance. It removes distortions related to interleaving such as time-skew, offset- and gain- errors. Corrections are made transparently and in real time without any need of specific calibration signals. The IP is available in the delivery formats software IP, FPGA IP and silicon IP. For evaluation of the technology or examples of ADC array system design with the IP, SP Devices offers EVM hardware for different target specifications.

ADX Design Kit

The ADX Design Kits are the packages to use for in-design of the ADX IP on FPGAs. The kits contain all necessary contents to provide an easy integration.

ADX2 Design Kit

ADX2 Design Kit

ADX2 doubles the effective sampling rate and supports up to 16 bits vertical resolution. Available for Xilinx FPGA devices.

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ADX4 Design Kit

ADX4 Design Kit

ADX4 quardruples the effective sampling rate and supports up to 16 bits vertical resolution. Available for Xilinx FPGA devices.

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Evaluation Modules

The ADX EVMs (EValuation Modules) are hardware platforms with specific ADC arrays interleaved in different configurations. Use the EVM to evaluate the ADX technology and ADX Design kit for implementing ADX into the target system. Combined with an ADX license, the EVM can also be used as a direct solution to a system's AD conversion. Customization of the EVMs for target systems is possible.

ADX4-EVM-2000/12

ADX4-EVM-2000/12

4 x 12-bit ADCs interleaved to 2000 MSPS in cooperation with Intersil.

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ADX2-EVM-260/16

ADX2-EVM-260/16

2 x 16-bit ADCs interleaved to 260 MSPS in cooperation with National Semiconductor.

 

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ADX4-EVM 1600/14

ADX4-EVM 1600/14

4 x 14-bit ADCs interleaved to 1600 MSPS in cooperation with Texas Instruments.

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ADX2-EVM 800/14

ADX2-EVM 800/14

2 x 14-bit ADCs interleaved to 800 MSPS in cooperation with Texas Instruments.

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ADX2-EVM 1100/12

ADX2-EVM 1100/12

2 x 12-bit ADCs interleaved to 1100 MSPS in cooperation with Texas Instruments.

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ADX4-EVM 2200/12

ADX4-EVM 2200/12

4 x 12-bit ADCs interleaved to 2200 MSPS in cooperation with Texas Instruments.

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ADX Licenses

For the production of systems with the ADX interleaving IP, each individual system must be equipped with a run-time license. Licenses for FPGA IP is supplied on a license EEPROM device (1-wire).

ADX2

ADX2

Licenses for the ADX2 IP delivered as license EEPROM for FPGA IP. Contact SP Devices for volume pricing.

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ADX4

ADX4

Licenses for the ADX4 IP delivered as license EEPROM for FPGA IP. Contact SP Devices for volume pricing.

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ADX Design services

SP Devices offer design services in both the analogue and digital domain to support system development with the ADX IP cores. Click here to read more.

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