Teledyne SP Devices

ADX - Time-interleaved ADC error correction

Time‑interleaving of analog‑to‑digital converters (ADCs) is a way to increase the overall system sampling rate by using several ADCs in parallel. The challenge is to handle the mismatch between the individual ADCs, especially at higher frequencies.

Higher speed

The SP Devices interleaving technology provides our customers with a method of increasing the sampling rates of their A/D solutions. The interleaving process involves the signal being sampled at different times by one of a number of parallel ADCs. The overall sampling rate is in this way multiplied by the number of ADCs.

Interleaving

Handling the mismatch

The challenge with interleaving is to correct for the manufacturing variations of the characteristics of the individual ADC, in order to obtain the optimal resolution. The variation after correction must be less than 0.01% in order to achieve the successful interleaving of a typical 14‑bit ADC! Furthermore, these variations depend on temperature and age, making the corrections required even more complex.

Mismatch errors

The ADX technology

ADX is a digital block for the post‑processing of the output from interleaved ADCs that can be used with any ADC. The ADX technology features both the estimation of mismatch error and the reconstruction of the signal with all mismatch errors suppressed.

The proprietary technology of ADX continuously provides a background estimate of the gain, offset and time‑skew errors of the ADCs without the need for any special calibration signal or post‑production trimming. Our patented reconstructor block recreates the signal with minimal latency.


"The technical and intellectual support from the team at Teledyne SP Devices has been playing an important role in our research."

Associate Professor at Hong Kong University (HKU)
who has implemented a system supporting line scan rates of 10M lines/s

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