With the powerful ADQ108 and ADQ412 digitizers, SP Devices ADQ V6 Digitizer Family has already set the standard for state-of-the-art data capture in terms of sampling rate and vertical resolution. The 8-bit ADQ108 offers up to 6.4 GS/s sampling rate, while the 12-bit ADQ412 enables dual channel operation at up to 3.6 GS/s per channel.

Previously available in a compact stand-alone USB format as well as a flexible and high-throughput cPCIe/PXIe version, we are now pleased to also introduce a PCI Express version of these popular products.

The ADQ V6 Digitizer Family features 1 GB of on-board memory and the PCI Express version offers an 8-lane (x8) PCIe bus which allows for high-throughput data transfers of over 1 GB/s to PC memory. Advanced triggering modes are supported and include pre- and post-trigger, trigger hold-off, level trigger, and external trigger. A multi-record feature allows for capturing of data records of specified length on each incoming trigger event.

Software is of included free of charge with the purchase of a digitizer and includes easy-to-use ADCaptureLab as well as a C/C++ software development kit (SDK) and a dynamic link library (DLL) to be used for example with LabView.

The digitizers employ a powerful Xilinx Virtex 6 LX240T FPGA that supports high-performance logic and advanced serial connectivity. Customers can gain access to the FPGA by purchasing the optional ADQ Development Kit.

The ADQ214 is a dual-channel digitizer with 14 bits vertical resolution, 400 MS/s sampling rate, and 128 MSamples on-board memory. It is available with USB or cPCIe/PXIe interface and employs two Xilinx Virtex 5 devices that can be accessed through the optional ADQ Development Kit. The combination of high speed, high resolution and wide bandwidth makes it ideal for broadband applications such as IF sampling of RF signals and high-speed data recording. Excellent spectral purity in combination with low noise also makes the ADQ214 ideal for noise measurements.

We are now improving the flexibility of this device by adding software-selectable AC/DC coupling. The type of coupling can easily be changed both in the stand-alone software ADCaptureLab and through the C/C++ API.

Time-interleaving of analog-to-digital converters (ADCs) is a way to increase the overall system sampling rate by using several ADCs in parallel. The challenge is to handle the mismatch between the individual ADCs, especially at higher frequencies. With its unique self-learning and high-resolution capabilities, SP Device's ADX technology offers previously unseen performance. Corrections are made transparently and in real-time without any need for calibration signals or idle time slots during which to perform calibration. The mismatch correction algorithm supports a resolution of up to 16 bits, with a preserved SFDR of up to 95 dB, depending on the properties of the specific ADC array.

We help our customers to improve competitiveness regardless of where they are positioned in the value chain. The offering from SP Devices covers the complete range from Silicon Manufacturers to System Integrators. SP Device's products are available as Silicon IP, FPGA IP, reference designs, and complete digitizer boards.

The ADX interleaving technology is available as silicon IP for chip manufacturers and semiconductor companies who need to increase ADC sampling speed. ADX is also available as FPGA IP, targeting the market of system suppliers, digitizer companies, and T&M companies.

For customers who do not want to design their own digitizer solution, SP Devices offers both off-the-shelf digitizer solutions as well as customized digitizers.

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Read previous issues online:

Issue #1, 2010 : Ultra High-Speed Digitizers with Xilinx Virtex 6 FPGAs
Issue #2, 2010 : Release of our Latest 14-bit ADC Evaluation Module Which Features 1.6 GS/s