PRODUCT INFORMATION | |
---|---|
1), 2) Depending on product options, see datasheet. | |
Sample rate | 140 - 800 MSPS |
Resolution | 14 bit |
Input signal range | 0.25 or 2.2 Vpp1) |
Input channels | 1 |
Input bandwidth | DC - 720 MHz2) |
Memory size | 128 MSamples |
Trigger | Software/Ext./Level |
Internal clock |
Software selectable sample rate |
External clock | 0.25 - 2 Vpp |
Interfaces | USB 2.0 & PXIe |
Dimensions | 100 x 160 mm |
Case dimensions | 103 x 163 mm |
ADQ114 Last Time Buy
The ADQ114 is the world leading 14 bit digitizer. With its unique 800 MSps capture rate, enabled by SP Devices’ ADC interleaving technology ADX, the ADQ114 opens for demanding measurements such as RF/IF sampling, high resolution ultra sound imaging and high-speed data recording.
Analog Front End (AFE)
In its default configuration, the ADQ114 comes with an AC-coupled AFE with a lower cut-off frequency of 10 Hz, but several options are available such as a DC AFE which uses amplifiers, or a low frequency AC coupled AFE. See the ADQ114 Datasheet for further details and for ordering information.
Interface to the Host
The digitizer connects to the host via a high-speed USB 2.0 cable or through an optional Compact PCI Express / PXI Express interface. All interface types allows for streaming of data at high transfer rates.
3-year warranty on SP Devices' products
Buy with confidence - our products are manufactured to the highest standards of quality and technology.
Software Development Kit (SDK)
The ADQ114 comes with an easy-to-use API that allows easy integration into any application. Software tools for application development include C/C++, Matlab and DLLs for Windows XP/Vista. The SDK also includes SP Devices´ data capture tool, ADCaptureLab.
FPGAs and the ADQ Development Kit
The ADQ114 employs two Xilinx Virtex 5 FPGAs. The first FPGA, a XC5VSX50T-1, runs the SP Devices’ interleaving algorithm. The second FPGA, a XC5VLX30T-1, handles the data management, such as DRAM, host communication, triggers and control. This FPGA is opened to the user through the ADQ Development Kit for implementation of customized signal processing. This kit contains everything that is needed to get started with the FPGA development, and also includes examples and documentation. FPGA upgrades are available for demanding real time signal processing tasks.
Acquisition Functions
Standard trigger options are external, internal, software and level trigger. For PXIe units the backplane triggers are also available. The multi-record mode can be combined with any trigger function. Every record is tagged with a header containing time stamp (timing information), record counter, trigger counter and the trigger type for the record. Enhanced trigger accuracy gives trigger time on sub sample level.
ADQ Design Services
SP Devices' offers the possibility of customizing the ADQ series digitizer boards. Customizations can include hardware, software and FPGA firmware changes. Read more about our design services here.
Further Information
For further information, download the datasheet here, and you will be contacted by our sales department.
Associate Professor at Hong Kong University (HKU)
who has implemented a system supporting line scan rates of 10M lines/s
prof. Jakub Čížek, Department of Low Temperature Physics at Charles University, Prague
Associate Professor at Hong Kong University (HKU)
who has implemented a system supporting line scan rates of 10M lines/s
M. Sc. Grzegorz Nitecki, Faculty of Electronics, Military Academy of Technology, Warsaw, Poland
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