Teledyne SP Devices

Data Acquisition Signal Processing IP

Overview

SP Devices provides signal processing IP for digital performance enhancement of analog-to-digital conversion and input signal paths. The IP products are available for implementation in application specific integrated circuits (ASICs) or for integration on field-programmable gate array (FPGA) platforms. Our portfolio of products enables our customers to build systems with state-of-the-art analog-to-digital performance that enables advances in areas such as broadband communcation transceivers, instrumentation, high-speed data acquisition, Radar, and signals intelligence. We also incorporate our IP in our range of high-speed digitizers.

DBS - Digital Baseline Stabilizer for Time-Domain Pulse Applications

DBS - Digital Baseline Stabilizer for Time-Domain Pulse Applications

Digital Baseline Stabilizer

Baseline (DC level) drift caused by temperature fluctuations and other factors can result in false readings and/or performance degradation in time-domain pulse applications. Furthermore pattern noise from time-interleaved ADCs makes the situation even worse.

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ADX - Time-interleaving Technology for Analog-to-Digital Converters (ADCs)

ADX - Time-interleaving Technology for Analog-to-Digital Converters (ADCs)

ADC Interleaving

Time‑interleaving of analog‑to‑digital converters (ADCs) is a way to increase the overall system sample rate by using several ADCs in parallel. The challenge is to handle the mismatch between the individual ADCs, especially at higher frequencies.

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ADL - Linearization Technology for Signal Path Performance Enhancement

ADL - Linearization Technology for Signal Path Performance Enhancement

ADC Interleaving

Digital post‑linearization increases the effective resolution of analog‑to‑digital conversions. The ADL linearization technology developed by SP Devices suppresses performance-limiting non‑linearities of ADCs and the preceding signal path (amplifiers, filters, buffers, etc.).

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IQE - I/Q Imbalance Correction Technology

IQE - I/Q Imbalance Correction Technology

ADC Interleaving

Digital I/Q imbalance correction match the in-phase and quadrature signal paths in radio architectures employing complex demodulators such as direct down-conversion receivers. The distortion due to signal path imbalances is attenuated effectively over a large bandwidth.

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"The technical and intellectual support from the team at Teledyne SP Devices has been playing an important role in our research."

Associate Professor at Hong Kong University (HKU)
who has implemented a system supporting line scan rates of 10M lines/s

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