Description of the image
Swe​​pt-Sourc​e Optical Coher​en​ce Tom​​​​ograp​​hy​


Swept-Source Optical Coherence Tomography (SS-OCT) is a non-invasive interferometric imaging technique used in both medical and industrial applications. Examples of end-use include ophthalmology (diagnosis and treatment of eye disorders), industrial defect inspection, in-vivo cancer imaging, and more.

SS-OCT systems utilize a swept-source laser that repeatedly emits laser light with sweeping (varying) wavelength. A single sweep is referred to as an A-scan, and a high scan rate is desirable to support a large scanning area while limiting unwanted artifacts originating from for example eye movement. Multiple A-scans are performed at different locations to produce slice (2D) or volume (3D) scans, referred to as B-scan and C-scan respectively.

Existing SS-OCT systems commonly operate at either 1060 nm or 1310 nm center wavelength and support A-scan rates in the range of 100 to 400 kHz. The laser source often includes an A-scan trigger output that is connected to the digitizer's trigger input.

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Wavenumber and k-clock

The swept-source laser wavelength is incremented or decremented within each A-scan. For example, the wavelength may change from 1010 nm to 1110 nm in 4096 steps. The step size is non-linear and increase (or decrease) with wavelength. A specific wavelength is identified by its so-called wavenumber, denoted k, and many lasers offer an output signal called k-clock or k-trigger. This clock is often created using a Mach-Zehnder interferometer (MZI) and is utilized by the digitizer to acquire one sample for each wavelength. Due to its non-linear nature, the k-clock frequency varies during the A-scan and can for example span frequencies from 400 to 600 MHz.

Direct clocking versus k-clock remapping

Some SS-OCT systems utilize the k-clock as an external clock to the digitizer, however, this approach has many disadvantages:

  • Analog-to-digital converters (ADCs) in high-performance digitizers require high-quality clock sources with very low jitter. The k-clock does not fulfill these requirements, and therefore ADC analog performance is degraded.
  • The k-clock can exhibit noise or spikes and is sometimes even turned off completely during parts of the scan.
  • The sample-and-hold circuit inside the ADCs is designed for using a clock with a constant duty cycle. Varying duty cycles may lead to bad ADC output samples or even occasional data loss.
  • Direct clocking is only possible with older-generation ADCs that utilize parallel data interfaces such as Low Voltage Differential Signaling (LVDS). Such ADCs only support limited sampling rates and therefore limit achievable A-scan rates.

A better approach is to connect both the k-clock and the OCT signal to analog inputs on the digitizer. Both signals are then digitized simultaneously by the ADCs, while the digitizer is clocked with an internal or external stable high-precision source in order to maximize analog acquisition performance.

A-scan and B-scan trigger outputs from the laser can optionally be connected to trigger inputs on the digitizer for synchronization. These trigger inputs support A-/B-scan trigger rates up to 10 MHz pulse repetition frequency.




The k-clock is nonuniform with varying frequency.

K-clock remapping or resampling is a computational method used to extract the desired SS-OCT samples. The remapping typically includes interpolation that helps estimate the OCT input amplitude at K-clock zero-crossing instances. Interpolation and estimation are performed in real-time inside the digitizer’s onboard FPGA. This principle is illustrated in the figure below.​​​



Teledyne SP Devices’ real-time k-space remapping firmware, FWOCT, is currently available for evaluation by selected customers. More information will be made available soon, meanwhile please contact your local sales representative for additional information and/or to request evaluation.​​


Results using ADQ32 with FWOCT 
  • A-scan rate = 200 kHz
  • K-clock frequency is 900 MHz max
  • SS-OCT signal frequency is 900 MHz max
  • K-space re-mapping performed in FPGA with FWOCT
    • The rising edges of the k-clock are used to sample the OCT signal
  • Image processing performed in GPU using Vortex OCT library
  • The averaged cross-section is an average of 500 B-scans​​​

Figure 1. Results of k-space remapping in FWOCT using k-clock rising edge


I​mprovements when using interpolation by 1.5 times​

  • K-space re-mapping performed in FPGA with FWOCT using 1.5x k-clock interpolation
  • K-clock interpolation increases the number of OCT sampling points therby enabling deeper penetration. The longer the FFT, the deeper the image
    • The k-clock interpolation factor was set to 1.5x which results in 1.5 remapped OCT sample points per k-clock period
    • Interpolation increases the number of OCT signal sample points. This increases the frequency content of the sampled data which increases image depth​

Figure 2. Results of k-space remapping in FWOCT using 1.5x k-clock interpolation. With extended
depth, you can see 
the posterior surface of the eye's lens.

Teledyne SP Devices offer both stand-alone firmware packages as well as firmware development kits:

  • FWOCT is an optional stand-alone firmware package that enables the use of advanced analog-to-digital converters (ADCs) within digitizers. The k-clock establishes a non-uniform time base, while modern ADCs require a stable time base for consistent and reliable operation. To address this, FWOCT treats the k-clock and OCT signal as separate analog channels. By implementing sophisticated digital signal processing techniques, FWOCT optimizes ADC performance. This approach ensures that the ADC operates under optimal conditions, thereby improving signal quality. FWOCT also offers additional commonly used real-time processing for SS-OCT, including FFT, background removal, and dispersion compensation.
  • The FPGA Development Kit (DEVDAQ) is a tool for developing custom digit​izer firmware.


Hardware options Resolution
 [b​its]
Channels & Sampling rate [GSPS]​​​​ A-/B-scan trigger rate max [kHz] ​K-clock range [MHz]​ OCT Signal Range [MHz]​ FFT Size [bins]
Background Correction Dispersion Compensation & Windowing Output format (Absolute square or logarithmic) Streaming Rate to GPU/CPU [Gbyte/s]​
​​ADQ32 12 2 x 2.5​
488
4 to 
1000
0 to 1000
​8​​​​​​k
​16-bit. 8k​​​​​​
​16-bit. 8k​​​​​​
​16-bit​​​​​​
7
ADQ33​​ ​12 2 x 1 488
1.6 to 400​ ​ ​0 to 400
8​k ​​ ​16-bit. 8k​​​​​​
​16-bit. 8k​​​​​​
​16-bit​​​​​​
7​​​​​​
AD​​Q35
12 ​2 x 5 488
4 to 2000​ 0 to 2000
32k​​​ ​16-bit. 32k​​​​​​
​16-bit. 32k​​​​​​​​​​​​
​​16-bit
​14​​​​​​
ADQ36
12 4 x 2.5
488
4 to 1000
0 to 1000
​8k​​​​
​16-bit. 8k​​​​​​
​16-bit. 8k​​​​​​> ​16-bit​
7

Firmware options​​​​​​ C​omment​​​​
FWOCT​ Optional k-space remapping firmware. ​
DEVDAQ​ Optional FPGA development kit based​​ on FWDAQ.​ ​