FWOCT for SS-OCT

FWOCT is an FPGA firmware for swept-source optical coherence tomography (SS-OCT), enabling real-time k-space remapping and signal processing directly on selected ADQ3-series digitizers.

By sampling both the OCT signal and the k-clock — including MZI-based k-clock signals — while using a high-quality, uniform sampling clock for the analog-to-digital converters (ADCs), the system supports higher k-clock frequencies and avoids the limitations of direct clocking.

FWOCT enables efficient real-time SS-OCT signal processing, helping system developers support higher A-scan rates, wide k-clock frequency ranges, and modern swept-source lasers operating at high sweep rates. This contributes to improved imaging depth and axial resolution while simplifying system design.

FWOCT integrates into SS-OCT systems to streamline data handling and reduce GPU workload, enabling more cost-efficient system architectures.

Use case examples​:

• High-speed ophthalmic imaging (e.g., retinal imaging at high A-scan rates)
• Intravascular imaging (high-speed pullback processing for real-time vessel visualization and stent assessment)
• Dental SS-OCT imaging (subsurface, high-resolution imaging for early detection of caries and structural defects beyond conventional X-ray)
• Deep tissue and long-range imaging (robust operation at high k-clock rates)
• Industrial inspection of layered or scattering materials (high dynamic range and stable acquisition)
• Custom and research SS-OCT systems (flexible integration with reduced GPU load)

Key Benefits of FWOCT

• Optimized ADC performance independent of k-clock quality
  Separating OCT signal and k-clock allows the ADC to operate with a stable sampling clock, reducing sensitivity to variations in k-clock signal quality
• Enables optimal use of latest-generation high-speed ADCs
  By decoupling the sampling clock from the k-clock, the ADC can operate under stable clock conditions, supporting high-performance data acquisition architectures
• Lower computational load on host system
  On-board FPGA processing reduces data transfer to CPU/GPU, enabling more efficient system design and potentially lower system cost
• Supports high A-scan rates and flexible sweep configurations
  Wide k-clock frequency support enables compatibility with modern swept-source lasers and high-speed OCT systems
• Flexible k-space remapping with interpolation
  Supports higher effective sampling density and advanced OCT signal processing approaches

Data Acquisition Challenges in SS-OCT Systems

Many SS-OCT systems utilize a non-uniform k-clock for direct sampling, while modern high-speed ADCs are optimized for a uniform, low-jitter sampling clock. This mismatch can impact signal quality and limit system performance, including achievable sampling rates and overall robustness.​

Solution: FPGA-Based k-Space Remapping

FWOCT implements k-space remapping in real time by sampling both the OCT signal and the k-clock as analog signals and performing the resampling using digital signal processing. This allows the ADC to operate in its intended mode while preserving signal accuracy.​

Legacy Solution – Direct Clocking	Modern Solution – K-clock Remapping (FWOCT)
Non-standard operating​ mode ADC used outside optimal conditions Low-quality clock source Legacy ADC interfaces (LVDS) Limits usable k-clock rate and acquisition speed	Standard ADC operation Optimized signal acquisition High-performance clocking Latest-generation ADC interfaces Supports higher k-clock rates and acquisition speed

System Architecture

In a typical SS-OCT system, the OCT signal and k-clock are sampled on separate channels. The FPGA detects k-clock zero-crossings and remaps the OCT signal to the k-domain b​​​efore further processing and streaming.​

Key Processing Steps

FWOCT integrates a complete signal processing pipeline inside the FPGA:

1. K-space remapping - resampling the OCT signal so that data acquired at a uniform time base is transformed into a uniform optical frequency (k-space) domain using the k-clock as a reference. There are many benefits to this approach:
   1. A wide range of k-clock frequencies are supported (e.g. 4.88 - 2000 MHz on the ADQ35).
   2. The k-clock can be interpolated to reach effective sampling rates beyond the raw k-clock frequency for improved image depth.
   3. OCT signal frequencies from 0 Hz up to 40% of the digitizer’s sampling rate are supported.
2. Background removal - a known/acquired background pattern can be removed from the collected signal before the FFT. This is done by writing a unique real-valued constant for each input index.
3. Dispersion compensation and windowing - the collected signal can be windowed and dispersion-compensated before the FFT. This is done by writing a unique complex-value constant for each input index.
4. Fast Fourier Transform (FFT) - FFT computed in real-time inside the FPGA.
5. Magnitude function of FFT output - four output modes exist:
   1. Pass-through: resampled time-domain data (FFT is disabled)
   2. Complex: Re(x) + Im(x)
   3. Squared magnitude: |x|²
   4. Logarithmic scale: 10 log10(|x|²)
6. Data compression - using fewer bits per sample in order to lower data transfer rates and post-processing load.

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Designed for OEM integration

• Application-focused engineering support
  Experienced team supporting SS-OCT system development and optimization
• Flexible customization capabilities
  Support for custom firmware, software, and hardware adaptations to meet specific system requirements
• Scalable production and delivery
  Collaboration with global manufacturing partners enables reliable delivery from prototyping to volume production
• Long-term system partnership
  Support throughout development, integration, and lifecycle management of OEM systems​​
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• Swept-Source Optical Coherence Tomography (SS-OCT)