Swe​​pt-Sourc​e Optical Coher​en​ce Tom​​​​ograp​​hy​

Swept-Source Optical Coherence Tomography (SS-OCT) is a non-invasive interferometric imaging technique used in both medical and industrial applications. Examples of end-use include ophthalmology (diagnosis and treatment of eye disorders), industrial defect inspection, in-vivo cancer imaging, and more.

SS-OCT systems utilize a swept-source laser that repeatedly emits laser light with sweeping (varying) wavelength. A single sweep is referred to as an A-scan, and a high scan rate is desirable to support a large scanning area while limiting unwanted artifacts originating from for example eye movement. Multiple A-scans are performed at different locations to produce slice (2D) or volume (3D) scans, referred to as B-scan and C-scan respectively.

Existing SS-OCT systems commonly operate at either 1060 nm or 1310 nm center wavelength and support A-scan rates in the range of 100 to 400 kHz. The laser source often includes an A-scan trigger output that is connected to the digitizer's trigger input.


Wavenumber and k-clock

The swept-source laser wavelength is incremented or decremented within each A-scan. For example, the wavelength may change from 1010 nm to 1110 nm in 4096 steps. The step size is non-linear and increase (or decrease) with wavelength. A specific wavelength is identified by its so-called wavenumber, denoted k, and many lasers offer an output signal called k-clock or k-trigger. This clock is often created using a Mach-Zehnder interferometer (MZI) and is utilized by the digitizer to acquire one sample for each wavelength. Due to its non-linear nature, the k-clock frequency varies during the A-scan and can for example span frequencies from 400 to 600 MHz.

Direct clocking versus k-clock remapping

Some SS-OCT systems utilize the k-clock as an external clock to the digitizer, however, this approach has many disadvantages:

  • Analog-to-digital converters (ADCs) in high-performance digitizers require high-quality clock sources with very low jitter. The k-clock does not fulfill these requirements, and therefore ADC analog performance is degraded.
  • The k-clock can exhibit noise or spikes and is sometimes even turned off completely during parts of the scan.
  • The sample-and-hold circuit inside the ADCs is designed for using a clock with a constant duty cycle. Varying duty cycles may lead to bad ADC output samples or even occasional data loss.
  • Direct clocking is only possible with older-generation ADCs that utilize parallel data interfaces such as Low Voltage Differential Signaling (LVDS). Such ADCs only support limited sampling rates and therefore limit achievable A-scan rates.

A better approach is to connect both the k-clock and the OCT signal to analog inputs on the digitizer. Both signals are then digitized simultaneously by the ADCs, while the digitizer is clocked with an internal or external stable high-precision source in order to maximize analog acquisition performance.

A-scan and B-scan trigger outputs from the laser can optionally be connected to trigger inputs on the digitizer for synchronization. These trigger inputs support A-/B-scan trigger rates up to 10 MHz pulse repetition frequency.

The k-clock is nonuniform with varying frequency. Furthermore, it is not phase-locked to the sampling clock of the digitizer, and therefore k-clock zero-crossings may not coincide with the digitizer's sampling instances.

K-clock remapping or resampling is a computational method used to extract the desired SS-OCT samples. The remapping typically includes interpolation that helps estimate the OCT input amplitude at K-clock zero-crossing instances. Interpolation and estimation are performed in real-time inside the digitizer’s onboard FPGA. This principle is illustrated in the figure below.​​​

Teledyne SP Devices’ real-time k-space remapping firmware, FWOCT, is currently available for evaluation by selected customers. More information will be made available soon, meanwhile please contact your local sales representative for additional information and/or to request evaluation.​​

Product Resolution [b​its] Sampling rate [GSPS]​​​​ A-/B-scan trigger rate [MHz] K-clock rate [MHz]​ ​Interf​ace
​​​​ Min​ Max​ ​​
ADQ36 12 5 10 50​ ​ 2000 PXIe (PCIe available soon) ​​
ADQ32 12 ​2.5 10 50​ 1000​​​ PCIe​​​
ADQ33​​ 12 1 10 50 ​400 ​PCIe​