FWDDC for real‑time RF signal processing

FWDDC is an FPGA-based digital downconversion (DDC) firmware option for frequency-domain applications. It is available for ADQ7DC and ADQ7WB digitizers and is also being evaluated by selected customers as a prototype on certain ADQ3-series models. Contact us if you are interested in participating in the evaluation program.

The primary purpose of FWDDC is to reduce the digitizer's output data rate, simplifying downstream signal processing and adapting the data stream to a rate that the host PC can handle.

Use case examples:​

• Satellite monitoring and spectrum surveillance (direct RF sampling with digital downconversion of selected bands for baseband analysis)
• Wideband RF signal capture and channelization (extracting narrowband signals of interest from multi‑GHz bandwidth inputs)
• Software-defined radio (SDR) and communication systems (real-time downconversion to complex I/Q for demodulation and decoding)
• Radar and EW signal analysis (frequency translation and decimation to isolate targets or chirps while reducing data throughput)
• Multi-channel and MIMO systems (synchronized downconversion of multiple RF channels for coherent processing)
• Automated test and measurement (ATE) (band-selective acquisition and data reduction for faster test cycles and lower storage needs)
• Real-time spectrum monitoring and interference detection (continuous streaming with FPGA-based downconversion for long-duration captures)
• Digital receiver prototyping and research (flexible NCO-based frequency tuning and baseband extraction without analog front-end changes)​
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Key Benefits of FWDDC

• Reduce data transfer rates without sacrificing front-end performance
  Transfers only the bandwidth of interest while maintaining full ADC sampling speed.
• Lower CPU, GPU, and storage requirements
  FWDDC reduces the amount of data that must be transferred, stored, and processed, enabling more cost-efficient host system architectures.
• Enable continuous streaming of high-bandwidth RF signals
  Helps keep data rates within the limits of interfaces such as PCIe, supporting long-duration acquisitions and continuous real-time streaming.
• Focus processing resources on the signals that matter
  Allowing downstream software and GPUs to concentrate on signals of interest rather than the entire digitized spectrum.
• Deploy without FPGA development
  Utilizes the FPGA already available onboard, eliminating the need for custom FPGA development while reducing integration effort and time-to-market.
• Scale from single-channel to synchronized multi-board systems
  Built-in synchronization support phase-coherent operation across multiple channels and digitizers, making FWDDC suitable for applications such as phased arrays, MIMO systems, and direction finding.​
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How FWDDC Works​

FWDDC performs digital downconversion directly in the FPGA of the digitizer (figure 3). For digitizers that support direct RF sampling across multiple Nyquist bands, an external analog filter is first used to select the frequency band of interest before digitization. A programmable NCO then shifts the selected signal band to complex baseband (I/Q), while decimation filters reduce bandwidth and output data rate before transfer to the host PC. This allows wideband RF signals to be processed efficiently while significantly reducing data throughput.

By transferring only the bandwidth of interest, FWDDC minimizes data throughput while preserving the information required for further signal processing in software running on a CPU or GPU.

Please note that the firmware reduces the data rate to the PC, but it is not a complete RF / IF receiver. Application-specific receiver functions such as channel filters, demodulation, decoding, or direction finding must be performed on a CPU or GPU (figure 3).

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Supported Hardware and Performance

⁽¹⁾ Supported instantaneous bandwidth is 80% of the selected Nyquist band.

⁽²⁾ Useable analog bandwidth at -6 dB.

Example Frequency Coverage for ADQ7WB

Many digitizers support direct RF sampling across multiple Nyquist bands. The band of interest is selected using an external analog filter, while the digitizer sampling rate and analog input bandwidth determine which frequency ranges can be acquired. Models supporting multiple sampling rates provide additional flexibility when planning frequency coverage. Figure 4 shows example frequency coverage for ADQ7WB operating at 5 GSPS (top) and 4 GSPS (bottom). Supported bandwidth within each Nyquist band scales with sampling rate, while coverage in the highest Nyquist band is ultimately limited by the digitizer's 6.5 GHz analog input bandwidth.

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Frequency Planning Example using ADQ35-WB

ADQ35-WB supports direct RF sampling across multiple Nyquist zones and offers several sampling-rate options in both single-channel and dual-channel modes. The figure below illustrates example frequency coverage for common L-, S-, and C-band signals and highlights how sampling rate and operating mode affect the available FWDDC bandwidth.

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Highlighted examples shown in Figure 5:

• Full S-band coverage using ADQ35-WB in single-channel mode at 10 GSPS sampling rate (supporting 0.5 to 4.5 GHz band)
• Extensive C-band coverage using single-channel mode at 8 GSPS
• Entire L-band coverage at 5 GSPS in dual-channel mode
• Dual-channel operation enables simultaneous acquisition on two channels while still providing wide frequency coverage across multiple Nyquist zones

• Satellite monitoring
• RADAR
• Channel sounding
• ​RF monitoring and recording
• 5G
• RF production testing​
  
• Signals intelligence
• Low-level RF (LLRF)​